Verification Overview

Ibex is verified using a UVM based testbench that employs a co-simulation methodology to cross-check Ibex execution against an ISS reference model (Spike). The testbench runs binaries built from source produced by the RISC-DV random instruction generator. Additional stimulus is provided in the form of randomized memory timings, memory errors, interrupts and debug requests by the testbench. A comprehensive testplan and coverage plan are implemented.

Verification Status

Ibex has a large number of parameters resulting in a large number of possible configurations. The configuration space is too large to fully verify the design for all possible parameter sets. To manage this complexity regressions runs and verification closure target a number of supported configurations.

Current verification closure effort is focussed on the opentitan configuration and is the only configuration with nightly regression runs. Verification maturity is tracked via Verification Stages that are defined by the OpenTitan project. Ibex has achieved V2S for the opentitan configuration, broadly this means verification is almost complete (over 90% code and functional coverage hit with over 90% regression pass rate with test plan and coverage plan fully implemented) but not yet closed.

Nightly regression results, including a coverage summary and details of test failures, for the opentitan Ibex configuration are published at Below is a summary of these results: