Introduction to Ibex

Ibex is a production-quality open source 32-bit RISC-V CPU core written in SystemVerilog. The CPU core is heavily parametrizable and well suited for embedded control applications. Ibex is being extensively verified and has seen multiple tape-outs.

Read on for more information Ibex in general: what standards it implements, what synthesis targets it supports, and what legal and financial obligations you have when using Ibex.

In this section

• Standards Compliance
• Synthesis Targets
  • ASIC Synthesis
  • FPGA Synthesis
• Licensing
• Verification Overview
  • Verification Status